In electronic packaging, chips continue to be made smaller but are required to perform greater functionality. As chips perform more functions, however, greater power is consumed and more heat is generated. Also, as the size of the chip is reduced, the generated heat is required to dissipate from a smaller surface area. In a silicon chip, for example, it can be difficult to control the silicon surface and junction temperature.
In a conventional package, a heat sink is attached to a back surface of a die using thermal paste. In FIG. 1, for example, a conventional package 100 is shown. The package 100 includes a substrate 102 coupled to a system board 106 by a plurality of solder balls 108. The area between the substrate 102 and system board 106 also includes an underfill layer 110A conventional die 104 is coupled to a back surface of the substrate 102 by a plurality of solder balls 116 or bumps. After the package 100 is assembled, a heat sink 112 is mounted to the back surface of the substrate 102 and the back surface of the die 104. Thermal paste 114 is used for securely mounting the heat sink 112 to the substrate 102 and die 104 and to improve thermal conductivity from the substrate 102 and die 104 to the heat sink 112. During operation, heat generated by the package 100 can be dissipated through the heat sink 112. However, the result of mounting the heat sink 112 to the package 100 can significantly increase the package size. In addition, attaching a heat sink to the conventional package 100 requires additional steps in the process of manufacturing and assembling the package. Therefore, it would be desirable to develop a compact, increased surface area solution for dissipating heat from a chip without reducing functionality or power consumption,